For comparison to previous bare metal results on the same hardware
First FPGA implementation of STAC-A2 benchmarks
Multiple records in performance and storage efficiency
Worst pairwise error between 94 ports on 2 devices was 799 picoseconds
Solution sets total of 17 records in scale and baseline benchmarks
Solution set latency records across both messages sizes
Following our highly attended online event in the spring, STAC is going worldwide, on-line, and live again this fall!
Join us October 19-21, 2020 for live panels, presentations, and exhibits that address the most important technical challenges in analytics technology, low-latency infrastructure, and command & control.
Interact directly with speakers, exhibitors, and your peers—all without leaving your home or office.
The financial technology community has one responsibility in the COVID-19 crisis that only it can fulfill.
The STAC-TS Working Group has poured a lot of effort into developing standards and software for demonstrating timestamp accuracy to the satisfaction of European regulators concerned with RTS 25 of MiFID 2. Much of that effort has concerned software-application timestamps. App timestamping is central to many firm's plans but is one of the most misunderstood issues with RTS 25.