STAC Reports: Exablaze under STAC-T0 (tick-to-trade network I/O) and STAC-TS.PSE (port sync)
Under STAC-T0, max actionable latency of 44 nanoseconds across all message sizes and rates
8 October 2019
We've just posted results from two testing projects on Exablaze products.
STAC-T0 uses accurate wire capture to measure the tick-to-trade network-I/O latency of any trading platform using UDP in, TCP out, and essentially no trading logic or market-specific protocol handling in between. The Exablaze "stack under test" (SUT) consisted of the ExaNIC V5P Network Application Card, ExaNIC FDK+ with ExaMAC and Accelerated TCP Engine (ATE), and ExaSOCK 2.3.0 with ATE support, all hosted in a Dell PowerEdge R230 Server.
As disclosed at recent STAC Summits, this SUT set new records in every measurement, with latencies more than 50% lower latency than previous records. Among these:
- Max actionable latency was just 44 nanoseconds across all message sizes and message rates (STAC-T0.ß1.*.*.ACTIONABLE.MAX)
- Minimum actionable latency was as low as 31 nanoseconds (STAC-T0.ß1.MEDRATE.B.ACTIONABLE.MIN and STAC-T0.ß1.HIGHRATE.B.ACTIONABLE.MIN)
- Maximum packet rates tested were higher than previous, at 11 million packets per second (6.2Gb/s) and 1.9 million packets per second (7.7Gb/s) on 68B and 507B frame sizes respectively. (Though these rates were limited by the test harness.)
"Actionable" latency is the time from the last bit of inbound data needed to make a trading decision to the first bit of the simulated outbound order.
STAC-TS.PSE1 replays packets simultaneously to two ports on the same card to measure the synchronization error between them. STAC-TS.PSE2 replays to ports on two cards in the same host to measure the synchronization error between cards, then extrapolates to the error between any port on one card to any port on the other. The SUT in this case was two Exablaze ExaNIC HPT network cards, each with two 10 GbE ports capable of timestamping inbound packets, and each port containing an Exablaze EXASFP10GSR 10G SFP+.
This was our first project with sub-nanosecond results:
- Worst case error of between two ports on a single device was 0 +/- 375 picoseconds (STAC-TS.PSE1.TOTAL)
- Worst case error of between two ports on two devices was -750 +/- 1875 picoseconds (STAC-TS.PSE2.TOTAL)
For details, please see the reports at the links above. Firms with subscripions to the Trade Flow STAC Track also have access to the test tools used in this project and the micro-detailed configuration information for the solution. To learn about subscription options, please contact us or take a minute to learn about subscription options.
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