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Second set of STAC-M3 results for the Pavilion Hyperparallel Flash Array.
Unaudited results of synchronization within and between Arista's latest ULL devices
Max latency of 0.789 microseconds from start of market data message to start of order frame
Solution sets 4 records in baseline tests.
2.67x the space efficiency and 1.25x the energy efficiency of a system using the single-chip Cascade Lake
NFS-based solution beats previously tested Lustre-based solution in most benchmarks
Solution sets 8 records in scale tests