STAC event content involving AMD

Show me some love: Improving the FPGA “Engineer Experience”

At the 17 October 2024 STAC Summit in New York, our panelists discussed 'Show me some love: Improving the FPGA “Engineer Experience”'. Panelists were:

Ben Maron, Head of Hardware Engineering, Hudson River Trading
Rajiv Perera, Director of Hardware and HFT Engineering, MA Capital
Michael Gorbovitski, Executive Director, Morgan Stanley
Lakshmi Aiyer, Director, Sr. FPGA ULL Developer, UBS Financial Services
Matthew Certosimo, Data Center FPGA Field Application Engineer, AMD
Vijay Akkaraju, Application Engineer Architect, System Verification Group (“SVG”) AE, Cadence

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John Courtney, Fintech Marketing Manager, AMD, presented this at the 3 December 2024 STAC Summit in London.

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John Courtney, Fintech Marketing Manager, AMD, presented this at the 4 December 2024 AI STAC in London.

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Michael McGuirk, Sr Product Manager, Data Center, AMD, presented this at the 17 October 2024 STAC Summit in New York.

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Michael McGuirk, Sr Product Manager, Data Center, AMD, presented this at the 17 October 2024 STAC Summit in New York.

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At the 14 May 2024 STAC Summit in New York, our panelists discussed "Doing GenAI at scale this year". Panelists were:

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Vasudevan Visvanathan, Product Marketing- Engineer, AMD, presented this at the 27 June 2024 STAC Summit in Singapore.

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Michael McGuirk, Sr Manager, Data Center Marketing, AMD, presented this at the 14 May 2024 STAC Summit in New York.

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At the 19 October 2023 STAC Summit in New York, our panelists discussed "Designing the right hardware stack for FPGA". Panelists were:

The following vendors gave short presentations before the panel discussion:

	"Trade Smarter and Trade Faster with the New AMD FPGA accelerator for Ultra-Low Latency Trading" Hamid Reza Salehi, Director Product Marketing, AMD
	"Arista 7130 Update: Ultra Low Latency 25G" Darrin Machay, Principal Engineer, Arista

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Hamid Reza Salehi, Director Product Marketing, AMD, presented this at the 19 October 2023 STAC Summit in New York.

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